Programming Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) nonvolatile memory requires medium high or high programming voltages in relation to other voltages used on the device. The devices used to provide these programming voltages should have sufficiently high junction breakdown voltage and are usually fabricated using gate oxide layers thicker than standard I/O devices to increase gate breakdown voltage. Incorporating the formation of these devices into existing complementary metal-oxide-semiconductor (CMOS) fabrication processes usually involves additional masks and process steps that are not part of conventional CMOS fabrication processes.
More particularly, to achieve sufficient gate and junction breakdown voltages, existing high (larger than 10V) or medium high (5 to 10V) voltage devices use customized doping profiles, especially at the edges of shallow trench isolation (STI) regions defining the active areas of these devices, as well as the aforementioned thicker gate, all of which contributes to lower yield.